SADIE, SUSIE and the Molecular 18

 

Molecular 18 Processor and Instruction Set

The Molecular word size is 18 bits, and the basic memory is 32K words.  The machine was generally known as the Molecular-18 for this reason.

The MSB (Bit 18) was a parity bit, so for all intents and purposes it was a 17 bit machine.

The minimal CPU contained the following registers:

    PC - Program counter

    MA - Memory address

    REGA - Register A

    REGB - Register B.

    C - Carry Flag

    GT - Greater Than Flag

Operation codes 2 through to 26  - Memory reference instructions

These instructions operated on either current page or zero page.   All of these instructions could operate indirectly.

Instruction words are organized as follows:

 

 

    |17|16|15|14|13|12|11|10| 9| 8| 7| 6| 5| 4| 3| 2| 1|

    |     |        |        |        |        |        |

    |OP-CODE       |I |Z | ----- Memory Address ------ |

        I = Indirection Flag   Z = Zero Page Flag

 

02 - JUMP    Jump to address            15 - ADAC Add to Reg A with carry

03 - JSBR    Jump to subroutine         16 - ADBC Add to Reg B with carry

04 - INSZ    Increment and skip on zero 17 - SFAC Subtract from Reg A with carry

05 - DESZ    Decrement and skip on zero 20 - SFBC Subtract from Reg B with carry

06 - ANDA    Logical AND                21 - LDA Load Reg A

07 - IORA    Logical OR                 22 - LDB Load Reg B

10 - XORA    Logical Exclusive OR       23 - CMPA Compare with Reg A

11 - ADA     Add to Reg A               24 - CMPB Compare with Reg B

12 - ADB     Add to Reg B               25 - STA Store Reg A

13 - SFA     Subtract from Reg A        26 - STB Store Reg B

14 - SFB     Subtract from Reg B

The CMPA and CMPB and other skip instructions conditionally skip the next instruction in sequence. The INSZ and DESZ instructions were commonly used to increment or decrement  a loop counter and skip if done, and it is also used as an general increment instruction, either followed by a no-op or in contexts where it is known that the result will never be zero.

The JSBR instruction stores the return address in relative word zero of the subroutine, with execution starting with relative word one.  Subroutine return is done with an indirect JUMP through the return address. Subroutines commonly increment their return addresses to index through inline parameter lists or to perform conditional skips over instructions following the call.  This is exactly the same as the PDP8

Operation code 0 - Register Instructions

    No memory reference in this group, so they execute in one machine cycle.    

    Micro-instructions could be combined, but only if from the same group.

 

 

    |17|16|15|14|13|12|11|10 | 9| 8| 7| 6| 5| 4| 3| 2| 1|

    |     |        |         |        |        |        |

    |Opcode 0      |Mode |A/B| --- Micro Instruction -- |

 

 

    | 12| 11|10 |  9  |  8  |  7  |  6  |  5  |  4  |  3  |  2  |  1  |

    |-----------------------------------------------------------------|

    |           |                 |                 |                 |

    | 0 | 1 |A/B|Clear|Left/ |Shift|Ro'te|With|Dec  |Inc  |Skip |Skip |

    |   |   |1/0|Carry|Right|     |     |carry|     |     |B16=0|B1=0 |

    |-----------------------------------------------------------------|

    | 0 | 1 |A/B|Clear|One's|Clear|Comp |Skip |Swap |Clear|Comp |Read |

    |   |   |1/0|Reg  |Comp |Carry|Carry|     |     |Sign |Sign |SWREG|

    |-----------------------------------------------------------------|

    | 0 | 1 |A/B|True |Left/ |Skip |Skip |Skip |Skip|Clear|Clear|One's|

    |   |   |1/0|False|Right|-ve  |not 0|carry|GT   |GT   |Reg  |Comp |

    |-----------------------------------------------------------------|

 

  

 

    Mode 00 - Various instructions

     0        NOP     No Operation

    1        HALT    Halt Processor

    2        MASK    Interrupt disable flags

    3        ACKI    Acknowledge Interrupt

    4        ION     Interrupts On

    5        IOFF    Interrupts Off

    6        SION    Skip if Interrupts On

    7        SIOFF   Skip if interrupts Off

    10       SMOF    Skip if Mains Fail interrupt

    11       SMON    Skip if mains on interrupt

    12       PRTY    Skip if partiry interrupt

    13       PRCT    Skip if memory protect interrupt

    14       BNDY    Skip if memory boundary interrupt

    15       MASW    Skip if MA=SR(Switch Reg)

    16       CONT    Skip if Continuous Interrupt switch on

    17       RSTN    I/O Reset

 

    Mode 01 - Shift and Rotate (Applies to Reg B also if bit 10 not set)

    2400     CLC     Clear Carry (Wrong group?)

    3001     ALSB    Skip if LSB of Reg A set

    3002     AMSB    Skip if MSB of Reg A set

    3004     INCA    Increment Reg A

    3010     DECA    Decrement Reg A

    3300     LSA     Left Shift Reg A (into carry)

    3100     RSA     Right shift Reg A 

    3040     RRA     Rotate right Reg A

    3260     LRAC    Left rotate Reg A with carry

    3060     RRAC    Right rotate Reg A with carry

    

  Mode 10 - Clear and Complement (Applies to Reg B alsi if bit 10 not set)

    5400     CLA     Clear Reg A

    5200     CPLA    Complement Reg A

    4100     CLC     Clear carry flag

    4040     CMPC    Complement carry flag

    4020     SKIP    Skip next instruction

    5010     SWPA    Swop top and bottom half of Reg A

    5004     CLSA    Clear sign (Bit 17) of Reg A

    5002     CPSA    Complement sign bit if Reg A

    5001     ESRA    Enter Switches in to Reg A

 

  Mode 11 - Alter/Skip

    7200     APOS    2   Skip if Reg A +ve (i.e. Bit 17 not set)

    7100     A=0     2   Skip if Reg A is zero

    7002     CLA     -   Clear Reg A

    7001     CPLA    -   Complement Reg A (NOT twos complement)

    6040     SKNC    2   Skip if carry not set

    6010     SNGT    2   Skip if not greater than set

    6004     CLGT    -   Clear greater than flag

    7600     ANEG    1   Skip if Reg A is -ve (i.e.Bit 17 not set)

    7500     AN0     1   Skip if Reg A is not zero

    6440     SK=C    1   Skip if carry flag set

    6410     S=GT    1   Skip if greater than flag set

 

  Instructions in the same group may not be combined.

  

Operation code 1 - Input / Output instructions

 

 

    | 12 |  11  |  10  |  9  |  8  |  7  |  6  |  5  |  4  |  3  |  2  |  1  |

    |------------------------------------------------------------------------|

    |                  |                 |                                   |

    |A/B |  Function   |   --  Mode --   |   ------- Device Address -------  |

    |------------------------------------------------------------------------|

    |1/0 |   0  |   0  |     |Device Reg |                                   |

    |    |No Operation |     |1, 2 or 3  |                                   |

    |------------------------------------------------------------------------|

    |    |   0  |   1  |     |Device Reg |                                   |

    |    |Set Busy /   |     |1, 2, or 3 |                                   |

    |    |Clear Done   |     |           |                                   |

    |------------------------------------------------------------------------|

    |    |   1  |  0   |     |Device Reg |                                   |

    |    |Clear Busy/  |     |1, 2, or 3 |                                   |

    |    |Clear Done   |     |           |                                   |

    |------------------------------------------------------------------------|

    |    |   1  |  1   |Read/|Device Reg | Read or Write transfer to device  |

    |    |Input/Output |Write|1, 2, or 3 | register.  Action depends on the  |

    |    |Pulse        |     |           | actual device                     |

    |------------------------------------------------------------------------|

    |    |   0  |  0   |  1  |  1  |  1  |                                   |

    |    |Skip if Busy |    Skip Mode    | No data transfer during           |

    |    |   0  |  1   |  1  |  1  |  1  | skip mode instructions.           |

    |    |Skip not Busy|    Skip Mode    |                                   |

    |    |   1  |  0   |  1  |  1  |  1  |                                   |

    |    |Skip if Done |    Skip Mode    |                                   |

    |    |   1  |  1   |  1  |  1  |  1  |                                   |

    |    |Skip not Done|    Skip Mode    |                                   |

    |------------------------------------------------------------------------|

 

Disk drives were assigned device codes from 70 to 77.   Terminals and Printers were assigned device codes from 47 up to 67.

Although a console as such wasn't needed, a terminal attached to device code 47 was necessary

 

Each attached device, in fact the device driver card, had up to three registers.   The actual function of the registers depended on the attached device.

 

The sole purpose of this web site is to record the history of these machines and to provide a reference site for computer historians.